A Simultaneous Implementation of Message Encoding using LSB Stegnography & Image Compression using Lifting Scheme on FPGA

The data in digital images can be manipulated to some extend without being detected by human eyes. An example of such manipulations is insertion of secret information which is often referred to as information hiding. In this research we embedded the secret text data in spatial domain of a given 8 bit gray scale image followed by image compression using IWT on hardware Spartan III(XC3S200TQ144-4). A successful information hiding should result in the undistinguishable Stego image to be transmitted via internet as well as the extraction of the hidden data from this Stego image with high degree of data integrity. This research provides a hardware solution for data hiding in 8 bit gray scale image using wellknown LSB Image Stegnography technique,followed by image compression using IWT so as to efficiently utilize network bandwidth for high speed operation. Also it is noticed that at receiver side using Reverse IWT both original image as well as hidden data can be successfully extracted. The design architecture when implemented on FPGA Spartan offers a processing time of just 19. 11 Sec for 128*128 gray scale image of bit depth 8 bits which might give an impulse for the researchers to a very fast,programmabale & cost effective hardware solution in the area of Secure Communication.